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17.3.H 'H' Instructions
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17.3.H 'H' Instructions
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<h3>HLT -- Halt</h3>
Opcode Instruction Clocks Description
F4 HLT 5 Halt
Operation
Enter Halt state;
<b>Description</b>
HALT stops instruction execution and places the 80386 in a HALT state.
An enabled interrupt, NMI, or a reset will resume execution. If an
interrupt (including NMI) is used to resume execution after HLT, the saved
CS:IP (or CS:EIP) value points to the instruction following HLT.
<b>Flags Affected</b>
None
<b>Protected Mode Exceptions</b>
HLT is a privileged instruction; #GP(0) if the current privilege level is
not 0
<b>Real Address Mode Exceptions</b>
None
<b>Virtual 8086 Mode Exceptions</b>
#GP(0); HLT is a privileged instruction
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