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17.3.N 'N' Instructions
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<a name="17-03-N"></a>
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17.3.N 'N' Instructions
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<a name="17-03-NEG"></a>
<h3>NEG -- Two's Complement Negation</h3>
Opcode Instruction Clocks Description
F6 /3 NEG r/m8 2/6 Two's complement negate r/m byte
F7 /3 NEG r/m16 2/6 Two's complement negate r/m word
F7 /3 NEG r/m32 2/6 Two's complement negate r/m dword
Operation
IF r/m = 0 THEN CF <- 0 ELSE CF <- 1; FI;
r/m <- - r/m;
<b>Description</b>
NEG replaces the value of a register or memory operand with its two's
complement. The operand is subtracted from zero, and the result is placed
in the operand.
The carry flag is set to 1, unless the operand is zero, in which case the
carry flag is cleared to 0.
<b>Flags Affected</b>
CF as described above; OF, SF, ZF, and PF as described in Appendix C
<b>Protected Mode Exceptions</b>
#GP(0) if the result is in a nonwritable segment; #GP(0) for an illegal
memory operand effective address in the CS, DS, ES, FS, or GS
segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code)
for a page fault
<b>Real Address Mode Exceptions</b>
Interrupt 13 if any part of the operand would lie outside of the effective
address space from 0 to 0FFFFH
<b>Virtual 8086 Mode Exceptions</b>
Same exceptions as in real-address mode; #PF(fault-code) for a page
fault
<a name="17-03-NOP"></a>
<h3>NOP -- No Operation</h3>
Opcode Instruction Clocks Description
90 NOP 3 No operation
<b>Description</b>
NOP performs no operation. NOP is a one-byte instruction that takes
up space but affects none of the machine context except (E)IP.
NOP is an alias mnemonic for the XCHG (E)AX, (E)AX instruction.
<b>Flags Affected</b>
None
<b>Protected Mode Exceptions</b>
None
<b>Real Address Mode Exceptions</b>
None
<b>Virtual 8086 Mode Exceptions</b>
None
<a name="17-03-NOT"></a>
<h3>NOT -- One's Complement Negation</h3>
Opcode Instruction Clocks Description
F6 /2 NOT r/m8 2/6 Reverse each bit of r/m byte
F7 /2 NOT r/m16 2/6 Reverse each bit of r/m word
F7 /2 NOT r/m32 2/6 Reverse each bit of r/m dword
Operation
r/m <- NOT r/m;
<b>Description</b>
NOT inverts the operand; every 1 becomes a 0, and vice versa.
<b>Flags Affected</b>
None
<b>Protected Mode Exceptions</b>
#GP(0) if the result is in a nonwritable segment; #GP(0) for an illegal
memory operand effective address in the CS, DS, ES, FS, or GS
segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code)
for a page fault
<b>Real Address Mode Exceptions</b>
Interrupt 13 if any part of the operand would lie outside of the effective
address space from 0 to 0FFFFH
<b>Virtual 8086 Mode Exceptions</b>
Same exceptions as in real-address mode; #PF(fault-code) for a page
fault
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